From the January 2017 issue of IEEE Transactions on Nanotechnology
by Masaharu Kobayashi ; Kyungmin Jang ; Nozomu Ueyama ; Toshiro Hiramoto
T-NANO, Vol. 16, Issue 2, pp. 253 – 258, January 2017.
Abstract: We have proposed and investigated a super steep subthreshold slope transistor by introducing negative capacitance of a ferroelectric HfO2 gate insulator to a vertical tunnel FET for energy efficient computing. The channel structure and gate insulator are systematically designed to maximize the Ion/Ioff ratio. The simulation study reveals that the electric field at the tunnel junction can be effectively enhanced by potential amplification due to the negative capacitance. The enhanced electric field increases the band-to-band tunneling rate and Ion/Ioff ratio, which results in 10x higher energy efficiency than in tunnel FET.