Special Section on “Nanoscale Architectures Symposium (NANOARCH 2020)”

UPDATED The IEEE Transactions on Nanotechnology (TNANO) seeks original manuscripts for a “Nanoscale Architectures Symposium (NANOARCH 2020)” Special Section

As COVID-19 pandemic precluded the organization of the 16th International Symposium on Nanoscale Architecture (NANOARCH 2020) we decided to propose a dedicated TNANO special section instead, which goal is to continue NANOARCH assumed mission to promote cross-disciplinary research work and seek inspiration to address the integrated nanoscale electronic systems challenges. The session scope incorporates several exciting areas on emerging computing paradigms (e.g., approximate, stochastic, quantum, neuromorphic, molecular, spintronic), novel nanoscale computing architectures, 2D material-based (e.g., graphene) nanoelectronics and computing architectures, beyond charge-based computing, emerging memory devices and in memory computing, and nanoelectronics for biomedical systems.

We invite potential authors to submit Regular Papers as per the T-NANO requirements in the area of nanocomputing, nanofabrication, and emerging nanosystem applications. Relevant topics of interest include (but are not limited to):

  • Nanoelectronic circuits, nanofabrics, and nanocomputing architectures.
  • Future and emerging computing paradigms, e.g., approximate, stochastic, quantum, neuromorphic, molecular, spintronic.
  • Emerging memory nano-devices and in memory computing architectures.
  • Low-dimensional material based nanoelectronic technology, circuits and systems.
  • Defect/fault tolerant architecture, integration, and manufacturing.
  • Security architectures with nanofabrics.
  • Architecture, integration, and manufacturing of 3D IC and hybrid IC.
  • Nanodevice and nanocircuit models, methodologies and computer aided design tools.
  • Fundamental limits of computing at the nanoscale.
  • Novel nanodevices and manufacturing/integration ideas with innovations/focus on nanoarchitectures.

Follow the guidelines (http://site.ieee.org/tnano/author-info/), and submit your paper to ScholarOne Manuscripts at http://mc.manuscriptcentral.com/tnano, indicating in the cover letter that you wish the paper to be considered for “IEEE Transactions on Nanotechnology (TNANO) Special Section on “Nanoscale Architectures Symposium (NANOARCH 2020)”. Please note that the type of submissions is Regular Manuscripts, i.e., 4 to 8 pages in the two-column IEEE format, which includes figures, tables, and references. On submission to TNANO, authors should select the “Special Issue” manuscript type instead of “Regular Paper.”

Manuscripts will be subject to the standard competitive and constructive peer-review TNANO criteria with no article publishing charges. Accepted papers are published on the web in IEEE Xplore as soon as they are submitted in final form. Web-published papers have a DOI (Digital Object Identifier), and are fully citable and downloadable.

Important Dates

    • Submission deadline: July 15, 2020
    • First decision (accept/reject/revise): September 15, 2020
    • Revised papers submission: October 15, 2020
    • Final decision: December 15, 2020

Guest Editors

Prof. Vincent Gaudet Department of Electrical and Computer Engineering University of Waterloo, Ontario, Canada. Email: vcgaudet@uwaterloo.ca

Prof. Warren Gross Department of Electrical & Computer Engineering, McGill University, Montreal, Canada. Email: warren.gross@mcgill.ca

Prof. Lan Wei Department of Electrical & Computer Engineering, University of Waterloo, Waterloo, Canada. Email: l28wei@uwaterloo.ca

Prof. Jie Han Department of Electrical & Computer Engineering, University of Alberta, Edmonton, Canada. Email: jhan8@ualberta.ca

Responsible TNANO Senior Editor: Prof. Antonio Rubio

 

 

 

 

 

 

 

 

 

 

 

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